Many areas of digital electronics are directed to comparing several digital values and either selecting a specific value, for example, the lowest or the highest one, for further processing, or sorting the values in accordance with their relative rank, that is, according to the magnitude of their numerical value, for further processing.
For the comparison of two values, digital comparators have been known for some length of time as shown, for example, in the text entitled "Halbleiterschaltungstechnik", by U. Tietze, Ch. Schenk, 5th edition, Berlin, 1980. These devices compare the digital values P and Q present at their inputs and produce, dependent on the result of the comparison, a signal at one of the outputs P =Q, P &lt;Q, P &gt;Q for further processing.
Further, for comparison of two digital values, the use of arithmetic logic units (ALU) is known which utilize in this case only the subtraction instruction. In these ALU's, the carry or sign output, for example, can be utilized to indicate which of the two values temporarily present is the larger one.
For a comparison of more than two values it is known to arrange a suitable number of digital comparators or ALU's in a circuit such that initially two values are compared, followed by a comparison of the larger one of these two with the third value if the largest of all values is sought, and so on until all values have been covered. If it is desired to determine the median, that is, the mean value of a group of values, the possibility must exist to exchange the values upon each comparison. Each time a new value enters the process, it has to be compared with the values already sorted and exchanged, where applicable, until its appropriate position is established. Since the steps described for this sorting operation are executed sequentially, numerous memories or buffer registers and switches are necessary to handle all the further new groups of values continuously supplied (clocked) via the input channels as is the case, for example, in video-rapid image analysis utilizing synchronous clock pulses. In such an analysis, all incoming units of image information such as the gray values of the image elements of an evaluation window, have to be processed at the same frequency as they arrive. Therefore, in a large evaluation window involving the comparison of many values, the processing in many successive steps results in a highly complex structure comprised of many memories or buffer registers and switches for performing the selection or sorting operations.